FMOPA (widening, 2-way, FP8 to FP16)

8-bit floating-point sum of outer products and accumulate

The 8-bit floating-point sum of outer products and accumulate instruction works with a 16-bit element ZA tile.

This instruction widens the SVL_H×2 sub-matrix of 8-bit floating-point values held in the first source vector to half-precision floating-point values and multiplies it by the widened 2×SVL_H sub-matrix of 8-bit floating-point values in the second source vector to half-precision floating-point values.

Each source vector is independently predicated by a corresponding governing predicate. When a 8-bit source element is Inactive it is treated as having the value +0.0, but if both groups of source vector elements that correspond to a 16-bit destination element contain Inactive elements, then the destination element remains unmodified.

The resulting SVL_H×SVL_H half-precision floating-point sum of outer products are scaled by 2^{-UInt(FPMR.LSCALE[3:0])}, before being destructively added to the half-precision floating-point destination tile. This is equivalent to performing a downscaled 2-way dot product and accumulate to each of the destination tile elements.

Each 16-bit container of the first source vector holds 2 consecutive column elements of each row of a SVL_H×2 sub-matrix. Similarly, each 16-bit container of the second source vector holds 2 consecutive row elements of each column of a 2×SVL_H sub-matrix.

The 8-bit floating-point encoding format for the elements of the first source vector and the second source vector is selected by FPMR.F8S1 and FPMR.F8S2 respectively.

SME2
(FEAT_SME_F8F16)

if !IsFeatureImplemented(FEAT_SME_F8F16) then UNDEFINED; integer a = UInt(Pn); integer b = UInt(Pm); integer n = UInt(Zn); integer m = UInt(Zm); integer da = UInt(ZAda);