Halt instruction. An HLT instruction can generate a Halt Instruction debug event, which causes entry into Debug state.
Within a guarded memory region, while PSTATE.BTYPE != 0b00, a HLT instruction that would cause entry into Debug state will not generate a Branch Target Exception and will cause entry into Debug state as normal. For more information, see PSTATE.BTYPE.
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| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 0 | imm16 | 0 | 0 | 0 | 0 | 0 | |||||||||||||||
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HLT #<imm>
if EDSCR.HDE == '0' || !HaltingAllowed() then UNDEFINED; if IsFeatureImplemented(FEAT_BTI) then SetBTypeCompatible(TRUE);
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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