Lookup table read with 4-bit indexes
Copy 8-bit, 16-bit or 32-bit elements from ZT0 to one destination vector using packed 4-bit indices from a segment of the source vector register. A segment corresponds to a portion of the source vector that is consumed in order to fill the destination vector. The segment is selected by the vector segment index modulo the total number of segments.
This instruction is unpredicated.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | i3 | size | 0 | 0 | Zn | Zd |
if !HaveSME2() then UNDEFINED; if size == '11' then UNDEFINED; constant integer esize = 8 << UInt(size); integer isize = 4; integer n = UInt(Zn); integer d = UInt(Zd); integer imm = UInt(i3); constant integer nreg = 1;
<Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
<T> |
Is the size specifier,
encoded in
|
<Zn> |
Is the name of the source scalable vector register, encoded in the "Zn" field. |
<index> |
Is the vector segment index, in the range 0 to 7, encoded in the "i3" field. |
CheckStreamingSVEEnabled(); CheckSMEZT0Enabled(); constant integer VL = CurrentVL; constant integer elements = VL DIV esize; integer segments = esize DIV (isize * nreg); integer segment = imm MOD segments; bits(VL) indexes = Z[n, VL]; bits(512) table = ZT0[512]; for r = 0 to nreg-1 integer base = (segment * nreg + r) * elements; bits(VL) result; for e = 0 to elements-1 integer index = UInt(Elem[indexes, base+e, isize]); Elem[result, e, esize] = Elem[table, index, 32]<esize-1:0>; Z[d+r, VL] = result;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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