SHA1H -- A64

integer d = UInt(Rd); integer n = UInt(Rn); if !IsFeatureImplemented(FEAT_SHA1) then UNDEFINED;

<Sd>	Is the 32-bit name of the SIMD&FP destination register, encoded in the "Rd" field.

<Sn>	Is the 32-bit name of the SIMD&FP source register, encoded in the "Rn" field.

AArch64.CheckFPAdvSIMDEnabled(); bits(32) operand = V[n, 32]; // read element [0] only, [1-3] zeroed V[d, 32] = ROL(operand, 30);

If PSTATE.DIT is 1:

The execution time of this instruction is independent of:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.
The response of this instruction to asynchronous exceptions does not vary based on:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.

Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46

SHA1H