MemOp memop = if L == '1' then MemOp_LOAD else MemOp_STORE; constant integer datasize = 64 << UInt(Q); constant integer esize = 8 << UInt(size); integer elements = datasize DIV esize; integer rpt; // number of iterations integer selem; // structure elements case opcode of when '0000' rpt = 1; selem = 4; // LD/ST4 (4 registers) when '0010' rpt = 4; selem = 1; // LD/ST1 (4 registers) when '0100' rpt = 1; selem = 3; // LD/ST3 (3 registers) when '0110' rpt = 3; selem = 1; // LD/ST1 (3 registers) when '0111' rpt = 1; selem = 1; // LD/ST1 (1 register) when '1000' rpt = 1; selem = 2; // LD/ST2 (2 registers) when '1010' rpt = 2; selem = 1; // LD/ST1 (2 registers) otherwise UNDEFINED; // .1D format only permitted with LD1 & ST1 if size:Q == '110' && selem != 1 then UNDEFINED;

CheckFPAdvSIMDEnabled64(); bits(64) address; bits(64) eaddr; bits(64) offs; bits(datasize) rval; integer tt; constant integer ebytes = esize DIV 8; AccessDescriptor accdesc = CreateAccDescASIMD(memop, nontemporal, tagchecked); if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n, 64]; offs = Zeros(64); for r = 0 to rpt-1 for e = 0 to elements-1 tt = (t + r) MOD 32; for s = 0 to selem-1 rval = V[tt, datasize]; eaddr = GenerateAddress(address, offs, accdesc); if memop == MemOp_LOAD then Elem[rval, e, esize] = Mem[eaddr, ebytes, accdesc]; V[tt, datasize] = rval; else // memop == MemOp_STORE Mem[eaddr, ebytes, accdesc] = Elem[rval, e, esize]; offs = offs + ebytes; tt = (tt + 1) MOD 32; if wback then if m != 31 then offs = X[m, 64]; address = GenerateAddress(address, offs, accdesc); if n == 31 then SP[] = address; else X[n, 64] = address;