Unsigned saturating rounding shift left reversed vectors (predicated)
Shift active unsigned elements of the second source vector by corresponding elements of the first source vector and destructively place the rounded results in the corresponding elements of the first source vector. A positive shift amount performs a left shift, otherwise a right shift by the negated shift amount is performed. Each result element is saturated to the N-bit element's unsigned integer range 0 to (2N)-1. Inactive elements in the destination vector register remain unmodified.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | size | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | Pg | Zm | Zdn | |||||||||||
| Q | R | N | U | ||||||||||||||||||||||||||||
if !HaveSVE2() && !HaveSME() then UNDEFINED; constant integer esize = 8 << UInt(size); integer g = UInt(Pg); integer m = UInt(Zm); integer dn = UInt(Zdn);
| <Zdn> |
Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field. |
| <T> |
Is the size specifier,
encoded in
|
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
CheckSVEEnabled(); constant integer VL = CurrentVL; constant integer PL = VL DIV 8; constant integer elements = VL DIV esize; bits(PL) mask = P[g, PL]; bits(VL) operand1 = if AnyActiveElement(mask, esize) then Z[m, VL] else Zeros(VL); bits(VL) operand2 = Z[dn, VL]; bits(VL) result; for e = 0 to elements-1 if ActivePredicateElement(mask, e, esize) then integer element = UInt(Elem[operand1, e, esize]); integer shift = ShiftSat(SInt(Elem[operand2, e, esize]), esize); integer res; if shift >= 0 then res = element << shift; else shift = -shift; res = (element + (1 << (shift - 1))) >> shift; Elem[result, e, esize] = UnsignedSat(res, esize); else Elem[result, e, esize] = Elem[operand2, e, esize]; Z[dn, VL] = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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