Branch record buffer
For more information, see op0 == 0b01, cache maintenance, TLB maintenance, address translation, prediction restriction, BRBE, Trace Extension, and Guarded Control Stack instructions.
This is an alias of SYS. This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | op2 | Rt | ||||||
| L | op1 | CRn | CRm | ||||||||||||||||||||||||||||
BRB <brb_op>
is equivalent to
SYS #1, C7, C2, #<op2>{, <Xt>}
and is the preferred disassembly when SysOp('001', '0111', '0010', op2) == Sys_BRB.
The description of SYS gives the operational pseudocode for this instruction.
2026-03_rel 2026-03-26 20:48:11
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