System instruction
For more information, see op0 == 0b01, cache maintenance, TLB maintenance, address translation, prediction restriction, BRBE, Trace Extension, and Guarded Control Stack instructions for the encodings of System instructions.
This instruction is used by the aliases APAS, AT, BRB, CFP, COSP, CPP, DC, DVP, GCSPOPCX, GCSPOPX, GCSPUSHM, GCSPUSHX, GCSSS1, IC, TLBI, and TRCIT.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | op1 | CRn | CRm | op2 | Rt | ||||||||||||||
| L | |||||||||||||||||||||||||||||||
let t : integer = UInt(Rt); let sys_L : bits(1) = L; let sys_op0 : bits(2) = '01'; let sys_op1 : bits(3) = op1; let sys_op2 : bits(3) = op2; let sys_crn : bits(4) = CRn; let sys_crm : bits(4) = CRm;
| <op1> |
Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op1" field. |
| <Cn> |
Is a name 'Cn', with 'n' in the range 0 to 15, encoded in the "CRn" field. |
| <Cm> |
Is a name 'Cm', with 'm' in the range 0 to 15, encoded in the "CRm" field. |
| <op2> |
Is a 3-bit unsigned immediate, in the range 0 to 7, encoded in the "op2" field. |
| <Xt> |
Is the 64-bit name of the optional general-purpose source register, defaulting to '11111', encoded in the "Rt" field. |
| Alias | Is preferred when |
|---|---|
| APAS | op1 == '110' && CRn == '0111' && CRm == '0000' && op2 == '000' |
| AT | CRn == '0111' && CRm IN {'100x'} && SysOp(op1, '0111', CRm, op2) == Sys_AT |
| BRB | op1 == '001' && CRn == '0111' && CRm == '0010' && SysOp('001', '0111', '0010', op2) == Sys_BRB |
| CFP | op1 == '011' && CRn == '0111' && CRm == '0011' && op2 == '100' |
| COSP | op1 == '011' && CRn == '0111' && CRm == '0011' && op2 == '110' |
| CPP | op1 == '011' && CRn == '0111' && CRm == '0011' && op2 == '111' |
| DC | CRn == '0111' && SysOp(op1, '0111', CRm, op2) == Sys_DC |
| DVP | op1 == '011' && CRn == '0111' && CRm == '0011' && op2 == '101' |
| GCSPOPCX | op1 == '000' && CRn == '0111' && CRm == '0111' && op2 == '101' |
| GCSPOPX | op1 == '000' && CRn == '0111' && CRm == '0111' && op2 == '110' |
| GCSPUSHM | op1 == '011' && CRn == '0111' && CRm == '0111' && op2 == '000' |
| GCSPUSHX | op1 == '000' && CRn == '0111' && CRm == '0111' && op2 == '100' |
| GCSSS1 | op1 == '011' && CRn == '0111' && CRm == '0111' && op2 == '010' |
| IC | CRn == '0111' && SysOp(op1, '0111', CRm, op2) == Sys_IC |
| TLBI | CRn IN {'100x'} && SysOp(op1, CRn, CRm, op2) == Sys_TLBI |
| TRCIT | op1 == '011' && CRn == '0111' && CRm == '0010' && op2 == '111' |
2026-03_rel 2026-03-26 20:48:11
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