Unsigned Bitfield Move is usually accessed via one of its aliases, which are always preferred for disassembly.
If <imms> is greater than or equal to <immr>, this copies a bitfield of (<imms>-<immr>+1) bits starting from bit position <immr> in the source register to the least significant bits of the destination register.
If <imms> is less than <immr>, this copies a bitfield of (<imms>+1) bits from the least significant bits of the source register to bit position (regsize-<immr>) of the destination register, where regsize is the destination register size of 32 or 64 bits.
In both cases the destination bits below and above the bitfield are set to zero.
This instruction is used by the aliases LSL (immediate), LSR (immediate), UBFIZ, UBFX, UXTB, and UXTH.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | N | immr | imms | Rn | Rd | ||||||||||||||||||
| opc | |||||||||||||||||||||||||||||||
integer d = UInt(Rd); integer n = UInt(Rn); constant integer datasize = 32 << UInt(sf); integer r; bits(datasize) wmask; bits(datasize) tmask; if sf == '1' && N != '1' then UNDEFINED; if sf == '0' && (N != '0' || immr<5> != '0' || imms<5> != '0') then UNDEFINED; r = UInt(immr); (wmask, tmask) = DecodeBitMasks(N, imms, immr, FALSE, datasize);
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Wn> |
Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field. |
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xn> |
Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field. |
| Alias | Of variant | Is preferred when |
|---|---|---|
| LSL (immediate) | 32-bit | imms != '011111' && UInt(imms) + 1 == UInt(immr) |
| LSL (immediate) | 64-bit | imms != '111111' && UInt(imms) + 1 == UInt(immr) |
| LSR (immediate) | 32-bit | imms == '011111' |
| LSR (immediate) | 64-bit | imms == '111111' |
| UBFIZ | UInt(imms) < UInt(immr) | |
| UBFX | BFXPreferred(sf, opc<1>, imms, immr) | |
| UXTB | immr == '000000' && imms == '000111' | |
| UXTH | immr == '000000' && imms == '001111' |
bits(datasize) src = X[n, datasize]; // perform bitfield move on low bits bits(datasize) bot = ROR(src, r) AND wmask; // combine extension bits and result bits X[d, datasize] = bot AND tmask;
If PSTATE.DIT is 1:
Internal version only: aarchmrs v2023-12_rel, pseudocode v2023-12_rel, sve v2023-12_rel ; Build timestamp: 2023-12-15T16:46
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